View UPD16315_1917362.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1999 mos integrated circuit pd16315 1/4- to 1/12-duty fip tm (vfd) controller/driver data sheet document no. s14074ej1v0ds00 (1st edition) date published february 2003 ns cp(k) printed in japan the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. description the pd16315 is a fip (fluorescent indicator panel, or vacuum fluorescent display) controller/driver that is driven on a 1/4- to 1/12- duty factor. it consists of 16 segment output lines, 4 grid output lines, 8 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. serial data is input to the pd16315 through a three-line serial interface. this fip controller/driver is ideal as a peripheral device for a single-chip microcomputer. features ? multiple display modes: 16-segment & 12-digit to 24-segment & 4-digit ? key scanning: 16 x 2 matrix ? dimming circuit: 8 steps ? high-withstanding-voltage output: v dd ? 35 v max. ? led ports: 4 chs., 20 ma max. ? no external resistors necessary for driver outputs: p-ch open-drain + pull-down resistor output ? serial interface: clk, stb, d in , d out ordering information part number package pd16315gb-3bs 44-pin plastic qfp (10 x 10)
data sheet s14074ej1v0ds 2 pd16315 1. block diagram d in d out clk stb r osc key1, key2 led 1 led 4 v dd v ss v ee (+5 v) (0 v) ( ? 30 v) seg 1 /ks 1 seg 16 /ks 16 seg 17 /grid 12 seg 24 /grid 5 grid 4 grid 1 24 16 8 8 8 12 2 4 serial interface osc display memory 24 bits x 12 words key data memory (2 x 16 bits) 4-bit latch 12-bit shift register 24-bit output latch command decoder dimming circuit timing generator key scan grid driver data selector multiplexed driver segment driver
data sheet s14074ej1v0ds 3 pd16315 2. pin configuration (top view) 44-pin plastic qfp (10 x 10) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 led 1 led 2 led 3 led 4 osc d out d in clk stb key 1 key 2 v ss v dd seg 1 /ks 1 seg 2 /ks 2 seg 3 /ks 3 seg 4 /ks 4 seg 5 /ks 5 seg 6 /ks 6 seg 7 /ks 7 seg 8 /ks 8 seg 9 /ks 9 seg 19 /grid 10 seg 18 /grid 11 seg 17 /grid 12 v ee seg 16 /ks 16 seg 15 /ks 15 seg 14 /ks 14 seg 13 /ks 13 seg 12 /ks 12 seg 11 /ks 11 seg 10 /ks 10 33 32 31 30 29 28 27 26 25 24 23 44 43 42 41 40 39 38 37 36 35 34 v ss v dd grid 1 grid 2 grid 3 grid 4 seg 24 /grid 5 seg 23 /grid 6 seg 22 /grid 7 seg 21 /grid 8 seg 20 /grid 9 caution use all of the power supply pins.
data sheet s14074ej1v0ds 4 pd16315 3. pin function symbol pin name pin no. i/o description d in data input 7 input input serial data at rising edge of shift clock, starting from the low order bit. d out data output 6 output output serial data at the falling edge of the shift clock, starting from low order bit. this is n-ch open-drain output pin. stb strobe 9 ? initializes serial interface at the rising or falling edge of the pd16315. it then waits for reception of a command. data input after stb has fallen is processed as a command. while command data is processed, current processing is stopped, and the serial interface is initialized. while stb is high, clk is ignored. clk clock input 8 input reads serial data at the rising edge, and outputs data at the falling edge. osc oscillator pin 5 ? connect resistor to this pin to determine the oscillation frequency to this pin. connect resistor between this pin and gnd (v ss ). seg 1 /ks 1 to seg 16 /ks 16 high-withstanding-voltage output (segment) 14 to 29 output segment output pins (dual function as key source) grid 1 to grid 4 high-withstanding-voltage output (grid) 39 to 42 output grid output pins seg 17 /grid 12 to seg 24 /grid 5 high-withstanding-voltage output (segment/grid) 31 to 38 output these pins are selectable for segment or grid driving. led 1 to led 4 led output 1 to 4 output cmos output, +20 ma max. key 1 , key 2 key data input 10, 11 input data input to these pins is latched at the end of the display cycle. v dd logic power 13, 43 ? 5 v 10% v ss logic ground 12, 44 ? connect this pin to system gnd. v ee pull-down level 30 ? v dd ? 35 v max.
data sheet s14074ej1v0ds 5 pd16315 4. display ram address and display mode the display ram stores the data transmitted to the pd16315 through the serial communication. the addresses are allocated in 8-bit units. seg 1 seg 4 seg 8 seg 12 seg 16 seg 20 seg 24 00h l 00h u 01h l 01h u 02h l 02h u dig 1 03h l 03h u 04h l 04h u 05h l 05h u dig 2 06h l 06h u 07h l 07h u 08h l 08h u dig 3 09h l 09h u 0ah l 0ah u 0bh l 0bh u dig 4 0ch l 0ch u 0dh l 0dh u 0eh l 0eh u dig 5 0fh l 0fh u 10h l 10h u 11h l 11h u dig 6 12h l 12h u 13h l 13h u 14h l 14h u dig 7 15h l 15h u 16h l 16h u 17h l 17h u dig 8 18h l 18h u 19h l 19h u 1ah l 1ah u dig 9 1bh l 1bh u 1ch l 1ch u 1dh l 1dh u dig 10 1eh l 1eh u 1fh l 1fh u 20h l 20h u dig 11 21h l 21h u 22h l 22h u 23h l 23h u dig 12 b0 b3 b4 b7 xxh l xxh u lower 4 bits higher 4 bits
data sheet s14074ej1v0ds 6 pd16315 5. key matrix and key-input data storage ram the key matrix is made up of a 16 x 2 matrix, as shown below. seg 1 /ks 1 seg 2 /ks 2 seg 3 /ks 3 seg 4 /ks 4 seg 5 /ks 5 seg 6 /ks 6 seg 7 /ks 7 seg 8 /ks 8 seg 9 /ks 9 seg 10 /ks 10 seg 11 /ks 11 seg 12 /ks 12 seg 13 /ks 13 seg 14 /ks 14 seg 15 /ks 15 seg 16 /ks 16 key 1 key 2 the data of each key is stored as follows, and is read with the read command starting from the least significant bit. key 1 key 2 key 1 key 2 key 1 key 2 key 1 key 2 seg 1 /ks 1 seg 2 /ks 2 seg 3 /ks 3 seg 4 /ks 4 seg 5 /ks 5 seg 6 /ks 6 seg 7 /ks 7 seg 8 /ks 8 seg 9 /ks 9 seg 10 /ks 10 seg 11 /ks 11 seg 12 /ks 12 reading sequence seg 13 /ks 13 seg 14 /ks 14 seg 15 /ks 15 seg 16 /ks 16 b0 b1 b2 b3 b4 b5 b6 b7 5.1 led port data is written to the led port with the write command, starting from the least significant bit. ?l? output when the bit of this port is 0, and ?h? output when the bit is 1. the data of bits after the 5th bit are ignored. msb lsb b3 b2 b1 b0 ?? ? ? don't care led 1 led 2 led 3 led 4 remark power on application, all the led ports are ?l? output.
data sheet s14074ej1v0ds 7 pd16315 6. commands commands set the display mode and status of the fip tm (vfd) driver. the first 1 byte input to the pd16315 through the d in pin after the stb pin has fallen is regarded as a command. if stb is set high while commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are invalid (however, the commands/data previously transmitted remain valid). (1) display mode setting commands these commands initialize the pd16315 and select the number of segments and the number of grids (1/4- to 1/12- duty, 16 segments to 24 segments). when these commands are executed, the display is forcibly turned off, and key scanning is also stopped. to resume display, the display command ?on? must be executed. if the same mode is selected, however, nothing happens. msb lsb b2 b1 b0 00 ?? ? don't care display mode settings 0000 : 4 digits 24 segments 0001 : 5 digits 23 segments 0010 : 6 digits 22 segments 0011 : 7 digits 21 segments 0101 : 9 digits 19 segments 0110 : 10 digits 18 segments 0111 : 11 digits 17 segments : 12 digits 16segments 0100 : 8 digits 20segments 1xxx remark power on application, the 12-digit, 16-segment mode is selected.
data sheet s14074ej1v0ds 8 pd16315 (2) data setting commands these commands set data write and data read modes. msb lsb b2 b1 b0 01 ?? b3 don't care data write and read mode settings 00 : write data to display memory 01 : write data to led port 10 : read key data 11 : don't care address increment mode settings (display memory) 0 : increments address after data has been written 1 : fixes address test mode settings 0 : nomal operation 1 : test mode remark power on application, the normal operation and address increment modes are set. (3) address setting commands these commands set an address of the display memory. msb lsb 1 1 b5 b4 b3 b2 b1 b0 address (00h to 23h) remarks 1. if address 24h or higher is set, data is ignored, until a valid address is set. 2. power on application, the address is set to 00h.
data sheet s14074ej1v0ds 9 pd16315 (4) display control commands msb lsb b2 b1 b0 10 ?? b3 don't care dimming quantity settings 000 : set pulse width to 1/16. 001 : set pulse width to 2/16. 010 : set pulse width to 4/16. 011 : set pulse width to 10/16. 100 : set pulse width to 11/16. 101 : set pulse width to 12/16. 110 : set pulse width to 13/16. 111 : set pulse width to 14/16. turns on/off display. 0 : display off (key scan continues ) 1 : display on note note power on application, key scanning is stopped. remark power on application, the 1/16 pulse width is set and the display is turned off.
data sheet s14074ej1v0ds 10 pd16315 7. key scanning and display timing t disp ? 500 s seg output g 1 g 2 g 3 gn 1 frame = t disp x (n + 1) 1/16t disp dig 1 dig 2 dig 3 dign dig 1 key scan data remark one cycle of key scanning consists of two frame, and data in a 16 x 2 matrix is stored in ram. key scan expansion dign dig 1 1 910 11 12 13 14 15 16 2345678 1st frame 2nd frame
data sheet s14074ej1v0ds 11 pd16315 8. serial communication format reception (command/data write) stb d in clk 12 3 7 8 b0 b1 b2 b6 b7 if data continues transmission (data read) b7 b6 b5 b5 b4 b3 b2 b1 b0 b4 b3 b2 b1 b0 stb d in d out clk 11 22 33 44 55 66 78 t wait note a data read command is set. data is read. note when data is read, a wait time t wait of 1 s is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. remark because the d out pin is an n-ch, open-drain output pin, be sure to connect an external pull-up resistor (1 to 10 k ? ) to this pin.
data sheet s14074ej1v0ds 12 pd16315 9. electrical specifications absolute maximum ratings (t a = 25 c, v ss = 0 v) parameter symbol ratings unit logic supply voltage v dd ? 0.5 to +6.0 v driver supply voltage v ee v dd + 0.5 to v dd ? 40 v logic input voltage v i1 ? 0.5 to v dd + 0.5 v fip driver output voltage v o2 v ee ? 0.5 to v dd + 0.5 v led driver output current i o1 20 ma fip driver output current i o2 ? 40 (grid) ? 15 (segment) ma power dissipation p d 800 note mw operating ambient temperature t a ? 40 to +85 c storage temperature t stg ? 65 to +150 c note derate at ? 6.4 mw/ c at t a = 25 c or higher. caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. recommended operating range (t a = ? ? ? ? 20 to 70 c, v ss = 0 v) parameter symbol min. typ. max. unit logic supply voltage v dd 4.5 5 5.5 v high-level input voltage v ih 0.7 v dd v dd v low-level input voltage v il 00.3 v dd v driver supply votlage v ee 0v dd ? 35 v remark maximum power consumption p max . = fip driver dissipation + r l dissipation + led driver dissipation + dynamic power consumption where segment current = 3 ma, grid current = 15 ma, and led current = 20 ma, fip driver dissipation = number of segments x 6 + number of grids/(number of grids + 1) x 30 (mw) r l dissipation ? (v dd ? v ee ) 2 /50 x (number of segments + 1) (mw) led driver dissipation = number of leds x 20 (mw) dynamic power consumption = v dd x 5 (mw)
data sheet s14074ej1v0ds 13 pd16315 electrical characteristics (t a = ? ? ? ? 20 to +70 c, v dd = 4.5 to 5.5 v, v ss = 0 v, v ee = v dd ? ? ? ? 35 v) parameter symbol test conditions min. typ. max. unit high-level output voltage v oh1 led 1 - led 4 , i oh1 = ? 15 ma v dd ? 1v low-level output voltage v ol1 led 1 - led 4 , i ol1 = +15 ma 1 v low-level output voltage v ol2 d out , i ol2 = 4 ma 0.4 v high-level output current i oh21 v o = v dd ? 2 v, seg 1 / ks 1 to seg 16 / ks 16 ? 3ma high-level output current i oh22 v o = v dd ? 2 v, grid 1 to grid 4 seg 17 / grid 12 to seg 24 / grid 5 ? 15 ma driver leakage current i oleak v o = v dd ? 35 v, driver off ? 10 a output pull-down resistor r l driver output 40 65 120 k ? input current i i v i = v dd or v ss 1 a high-level input voltage v ih 0.7 v dd v low-level input voltage v il 0.3 v dd v hysteresis voltage v h clk, d in , stb 0.35 v dynamic current consumption i dddyn under no load, display off 5 ma switching characteristics (t a = ? ? ? ? 20 to +70 c, v dd = 4.5 to 5.5 v, v ee = ? ? ? ? 30 v) parameter symbol test conditions min. typ. max. unit oscillation frequency f osc r = 82 k ? 350 500 650 khz propagation delay time t plz clk d out 300 ns t pzl c l = 15 pf, r l = 10 k ? 100 ns rise time t tzh1 c l = 300 pf seg 1 /ks 1 to seg 16 /ks 16 2 s t tzh2 grid 1 to grid 4 , seg 17 /grid 12 to seg 24 /grid 5 0.5 s fall time t thz c l = 300 pf, seg n , grid n 160 s maximum clock frequency f max. duty = 50% 1 mhz input capacitance c i 15 pf
data sheet s14074ej1v0ds 14 pd16315 timing conditions (t a = ? ? ? ? 20 to 70 c, v dd = 4.5 to 5.5 v) parameter symbol test conditions min. typ. max. unit clock pulse width pw clk 400 ns strobe pulse width pw stb 1 s data setup time t setup 100 ns data hold time t hold 100 ns clock-strobe time t clk-stb clk stb 1 s wait time t wait clk clk note 1 s note refer to the serial communication format .
data sheet s14074ej1v0ds 15 pd16315 switching characteristic waveforms f osc osc 50% stb clk d in d out s n /g n pw stb t setup t pzl t plz t clk-stb t thz t tzh pw clk pw clk t hold 90% 10%
data sheet s14074ej1v0ds 16 pd16315 10. applications updating display memory by incrementing address command 1 command 2 command 3 command 4 data 1 data n ........... ........... stb clk d in command 1 : sets display mode command 2 : sets data command 3 : sets address data 1 to n : transfers display data (36 bytes max.) command 4 : controls display updating specific address command 1 command 2 command 2 data data stb clk d in command 1 : sets data command 2 : sets address data : display data
data sheet s14074ej1v0ds 17 pd16315 11. circuit example for application v dd 4 8 f+ f? c r 1 v dd d out d in clk stb v dd v ss v ee r 2 r 4 osc key 2 key 1 led led 1 led 2 led 3 led 4 r 3 pd16315 +5 v 0 v ? 30 v grid 1 to grid 4 seg 17 /grid 12 to seg 24 /grid 5 seg 16 /ks 16 seg 1 /ks 1 = to microcontroller r 1 , r 4 = 1 k to 10 k ? r 2 = 82 k ? r 3 = 330 to 1 k ? c = 0.1 to 1.0 f key matrix (16 x 2) note fluorescent indicator panel (fip ) (vfd) driving voltage for fip (vfd) remark note in the case of low-level output is display on signal. tm tm
data sheet s14074ej1v0ds 18 pd16315 12. package drawing 44-pin plastic qfp (10x10) item millimeters a b d g 13.2 0.2 10.0 0.2 0.8 (t.p.) 1.0 j 13.2 0.2 k s44gb-80-3bs-2 c 10.0 0.2 i 0.16 1.6 0.2 l 0.8 0.2 f 1.0 n p q s 0.10 2.7 0.1 0.125 0.075 3.0 max. m 0.17 + 0.06 ? 0.05 h 0.37 + 0.08 ? 0.07 r3 + 7 ? 3 note each lead centerline is located within 0.16 mm of its true position (t.p.) at maximum material condition. 33 34 22 44 1 12 11 23 s s n j detail of lead end c d a b r k m l p i s q g f m h
data sheet s14074ej1v0ds 19 pd16315 13. recommended soldering conditions the following conditions must be met for soldering conditions of the pd16315. for more details, refer to the semiconductor device mounting technology manual (c10535e). please consult with our sales offices in case other soldering process is used, or in case the soldering is done under different conditions. type of surface mount device pd16315gb-3bs : 44-pin plastic qfp (10 x 10) soldering process soldering conditions symbol infrared ray reflow peak package?s surface temperature: 235 c or below, reflow time: 30 seconds or below (210 c or higher), number of reflow process: max.3 ir35-00-3 vps peak package?s temperature: 215 c or below, reflow time: 25 to 40 seconds (200 c or higher), number of reflow process: max.3 vp15-00-3 wave soldering solder temperature: 260 c or below, flow time: 10 seconds or below temperature of pre-heat: 120 c pr below (plastic surface temperature) number of flow process: 1 ws60-00-1 partial heating method terminal temperature: 300 c or below, time 3 seconds or below (per side of pin position) ? caution do not apply more than a single process at once, except for partial heating method.
data sheet s14074ej1v0ds 20 pd16315 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
pd16315 reference documents nec semiconductor device reliability/quality control system (c10983e) quality grades on nec semiconductor devices (c11531e) fip tm is a trademark of nec corporation the information in this document is current as of february, 2003. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) ? ? ? ? ? ? m8e 02. 11-1 (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":

▲Up To Search▲

Price & Availability of UPD16315

	To Download UPD16315 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .